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2000 Microchip Technology Inc.
Advanced Information
DS30475A-page 121
PIC18CXX8
12.0
TIMER2 MODULE
The Timer2 module timer has the following features:
8-bit timer (TMR2 register)
8-bit period register (PR2)
Readable and writable (both registers)
Software programmable prescaler (1:1, 1:4, 1:16)
Software programmable postscaler (1:1 to 1:16)
Interrupt on TMR2 match of PR2
SSP module optional use of TMR2 output to gen-
erate clock shift
Register 12-1 shows the Timer2 Control register.
Timer2 can be shut off by clearing control bit TMR2ON
(T2CON register) to minimize power consumption.
Figure 12-1 is a simplified block diagram of the Timer2
module. The prescaler and postscaler selection of
Timer2 are controlled by this register.
12.1
Timer2 Operation
Timer2 can be used as the PWM time-base for the
PWM mode of the CCP module. The TMR2 register is
readable and writable, and is cleared on any device
RESET. The input clock (FOSC/4) has a prescale option
of
1:1,
1:4
or
1:16,
selected
by
control
bits
T2CKPS1:T2CKPS0 (T2CON Register).
The match
output of TMR2 goes through a 4-bit postscaler (which
gives a 1:1 to 1:16 scaling inclusive) to generate a
TMR2 interrupt (latched in flag bit TMR2IF, PIR regis-
ters).
The prescaler and postscaler counters are cleared
when any of the following occurs:
A write to the TMR2 register
A write to the T2CON register
Any device RESET (Power-on Reset, MCLR
Reset, Watchdog Timer Reset, or Brown-out
Reset)
TMR2 is not cleared when T2CON is written.
REGISTER 12-1:
T2CON REGISTER
Note:
Timer2 is disabled on POR.
U-0
R/W-0
—
TOUTPS3
TOUTPS2
TOUTPS1
TOUTPS0
TMR2ON
T2CKPS1
T2CKPS0
bit 7
bit 0
bit 7
Unimplemented: Read as '0'
bit 6-3
TOUTPS3:TOUTPS0: Timer2 Output Postscale Select bits
0000
= 1:1 Postscale
0001
= 1:2 Postscale
1111
= 1:16 Postscale
bit 2
TMR2ON: Timer2 On bit
1
= Timer2 is on
0
= Timer2 is off
bit 1-0
T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits
00
= Prescaler is 1
01
= Prescaler is 4
1x
= Prescaler is 16
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
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